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STA575
100+100W STEREO
s
POWER AMPLIFIER
s
s
s s s s s s
s
MONOCHIP BRIDGE STEREO AMPLIFIER ON BASH (R) ARCHITECTURE 80+80W OUTPUT POWER @ RL = 4/8 , THD = 0.5% 100+100W OUTPUT POWER @ RL = 4/8 , THD = 10% HIGH DYNAMIC PREAMPLIFIER INPUT STAGES EXTERNAL PROGRAMMABLE FEEDBACK TYPE COMPRESSORS AC COUPLED INPUT TO CLASS AB BRIDGE OUTPUT AMPLIFIER PRECISION RECTIFIERS TO DRIVE THE DIGITAL CONVERTER ON-OFF SEQUENCE/ TIMER WITH MUTE AND STANDBY PROPORTIONAL OVER POWER OUTPUT CURRENT TO LIMIT THE DIGITAL CONVERTER ABSOLUTE POWER BRIDGE OUTPUT
FLEXIWATT27
s s s s s
TRANSISTOR POWER PROTECTION ABSOLUTE OUTPUT CURRENT LIMIT INTEGRATED THERMAL PROTECTION POWER SUPPLY OVER VOLTAGE PROTECTION FLEXIWATT POWER PACKAGE WITH 27 PIN BASH(R) LICENCE REQUIRED
DESCRIPTION The STA575 is a fully integrated power module designed to implement a BASH(R) amplifier when used in conjunction with STABP01 digital processor.
BLOCK DIAGRAM
+VS GND -VS OUT_ PRE1 TRK_1 PWR_INP1
+ IN_PRE1 COMPRESSOR G
ABSOLUTE VALUE BLOCK
CD+1 +2 OUT1+ -1
OUT1-
OUTPUT BRIDGE ATT_REL1 V/l
CD-1
CD+ PEAK/2 DETECTOR Ict VOLTAGE PROTECTION
S1
SOA DETECTOR
PROT.
TRK_OUT THRESH THERMAL PROTECTION TURNON/OFF SEQUENCE
Ict
STBY/MUTE
S1
PEAK/2 DETECTOR
ATT_REL2
V/l CD+2 COMPRESSOR +2 G + -1 ABSOLUTE VALUE BLOCK OUT2OUT2+
IN_PRE2
OUTPUT BRIDGE
CD-2
OUT_ PRE2
TRK_2
PWR_INP2
D01AU1263
July 2003
1/20
STA575
DESCRIPTION (continued) Notice that normally only one Digital Converter is needed to supply a stereo or multi-channel amplifier system, therefore most of the functions implemented in the circuit have summing outputs The signal circuits are biased by fixed negative and positive voltages referred to Ground. Instead the final stages of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier. The Compressor circuits, one for each channel, performs a particular transfer behavior to avoid the dynamic restriction that an adaptive system like this requires. To have a high flexibility the attack / release time and the threshold levels are externally programmable. The tracking signal for the external digital converter is generated from the Absolute Value block that rectifies the audio signal present at the compressor output. The outputs of these blocks are decoupled by a diode to permit an easy sum of this signal for the multichannel application. The output power bridges have a dedicated input pin to perform an AC decoupling to cancel the compressor output DC offset. The gain of the stage is equal to 4 (+12dB). A sophisticated circuit performs the output transistor power detector that , with the digital converter, reduces the power supply voltage . Moreover, a maximum current output limiting and the over temperature sensor have been added to protect the circuit itself. The external voltage applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turnon and turn-off.
ABSOLUTE MAXIMUM RATINGS
Symbol +Vs -Vs VCD+ VCD+ VCDVCDVAtt_Rel1 VAtt_Rel2 VPwr_Imp1 VPwr_Imp2 VTrk_1 VTrk_2 VIn_pre1 VIn_pre2 Vthreshold Istb-max Vstbymute Iout Parameter Positive supply voltage referred to pin 13 (GND) Negative supply voltage referred to pin 13 (GND) Positive supply voltage tracking rail referred to pin 13 (GND) Positive supply voltage operated to Vs+(1) Negative supply voltage referred to -Vs (1) Negative supply voltage tracking rail referred to pin 13 (GND) Pin 3, 25 Negative & Positive maximum voltage referred to GND (pin 13) Pin 7, 21, 18, 10 Negative & Positive maximum voltage referred to GND (pin 13) Value 30 -24 22 0.3 -0.3 -22 -0.5 to +20 Unit V V V V V V V
-20 to +20
V
Pin 8, 20 Negative & Positive maximum voltage referred to GND (pin 13) Pin 17 Negative & Positive maximum voltage referred to GND (pin 13) Pin 11 maximum input current (Internal voltage clamp at 5V) Pin 11 negative maximum voltage referred to GND (pin 13) Output current
-0.5 to +0.5
V
-7 to +0.5 500 -0.5 7.7
V A V A
Note 1: VCD- must not be more negative than -Vs and VCD+ must not be more positive than +VS Note 2: All pins withstand 2KV ESD but not pin 11
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STA575
THERMAL DATA
Symbol Tj Max Junction temperature Parameter Value 150 1 Unit C C/W
Rth j_case Thermal Resistance Junction to case .............................. ..max
OPERATING RANGE
Symbol +Vs -Vs Vs+ VCD+ VCDIin_Max Vtrheshold Tamb Isb_max Positive supply voltage Negative supply voltage Delta positive supply voltage Positive supply voltage tracking rail Negative supply voltage tracking rail Current at pin In_Pre1, In_Pre2, related to compressor behaviour Voltage at pin Threshold Ambient Temperature Range Pin 11 maximum input current (Internal voltage clmp at 5V) Parameter Value +20 to +28 -10 to -23 5V (Vs+ - VCD+) 10V +3 to 20.7 -20.7 to -3 -1 to +1 -5 to 0 0 to 70 200 Unit V V V V V mA peak V C A
PIN CONNECTION
1
27
-VS
CD+
THRESHOLD
OUT_PRE2
IN_PRE2
PWR_INP2
CD+2
OUT2+
ATT_REL2
TRK_OUT
TRK_2
OUT2-
CD-2
CD-1
ATT-REL1
CD+1
PWR_INP1
IN_PRE1
OUT_PRE1
TRK_1
PROTECTION
OUT1+
OUT1-
STBY/MUTE
GND
+VS
D01AU1251
Note: Slug connected to pins n. 1 and 27
-Vs
3/20
STA575
PIN FUNCTION
N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Name -Vs CD-1 Att_Rel1 Out1+ Out1CD+1 Pwr_Inp1 In_pre1 Out_pre1 Trk_1 Stby/mute Protection Gnd +Vs CD+ Trk_out Threshold Trk_2 Out_pre2 In_pre2 Pwr_Inp2 CD+2 Out2Out2+ Att_Rel2 CD-2 -Vs Negative Bias Supply Channel 1 Time varying tracking rail negative power supply Attack release rate for channel 1 Channel 1 speaker positive output Channel 1 speaker negative output Channel 1 positive power supply Input to channel 1 power stage Pre-amp input for channel 1 (virtual ground) Output channel 1 pre-amp Absolute value block input for channel 1 Standby/mute input voltage control Protection signal for STABP01 digital processor Analog Ground Positive Bias Supply Time varying tracking rail positive power supply Reference output for STABP01 digital processor Compressor threshold input Absolute value block input for channel 2 Output channel 2 pre-amp Pre-amp input for channel 2 (virtual ground) Input to channel 2 power stage Channel 2 positive power supply Channel 2 speaker negative output Channel 2 speaker positive output Attack release rate for channel 2 Channel 2 Time varying tracking rail negative power supply Negative Bias Supply Description
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STA575
ELECTRICAL CHARACTERISTCS (Test Condition: Vs+ = 28V, Vs- = -23V, V CD+ = 20V, VCD- = -20V, RL = 8, external components at the nominal value f = 1KHz, Tamb = 25C unless otherwise specified
Symbol Parameter Test Condition Min. Typ. Max. Unit
PREAMPLIFIER AND COMPRESSOR Vout clamp Maximum Voltage at Out_pre pin Iin Vcontrol Audio input current Voltage at Attack_Release pin Attenuation = 0dB Attenuation = 6dB Attenuation = 26dB 0.35 6 -5 100 VCRT= 0V; Attenuation = 0dB VCRT= 0.5V; Attenuation = 6dB VCRT= 9V; Attenuation = 26dB VCRT= 0V; Attenuation = 0dB VCRT= 0.5V; Attenuation = 6dB VCRT= 9V; Attenuation = 26dB VCRT= 0V; Attenuation = 0dB VCRT= 0.5V; Attenuation = 6dB VCRT= 9V; Attenuation = 26dB 0.5 -15 -250 -1000 0.01 15 250 450 0.1 0.5 2 0 0.5 9 9 11 13 0.8 0.65 12 -1 Vpeak mA V V V V K mV mV mV % % % V V V 3 mA
VComp_
Th
Input voltage range for the compression Input impedance of Threshold pin Output Offset at Out_pre pin with:
Zth Voffset
THD
Distortion at Out_pre:
EN
Noise at Out_pre pin :
10(2) 50 60 1.5
Ict
Attack time current at pin Attack_release
1. This value is due to the thermal noise of the external resistors Rr and Ri.
TRACKING PARAMETERS Gtrk Vtrk_out Itrk_out Ztrk_in Tracking reference voltage gain Tracking ref. output voltage Current capability Input impedance (TRK1/2) 13 0 5 14 20 6 1 7 15 V V mA M
OUTPUT BRIDGE Gout Gch Gch Pout Half Output bridge gain Output bridge differential gain Output bridges gain mismatch Continuous Output Power THD = 0.5% THD = 10% THD = 10%; RL= 4; VCD+ = 16V; VCD- = -16V; VS+ = 22V; VS- = -22V THD Total harmonic distortion of the output bridge Output bridge D.C. offset Po = 5W f = 20Hz to 20KHz; Po = 50W VOff -70 5.5 11 -0.5 75 95 90 80 100 100 0.01 0.1 0.2 70 6 12 6.5 13 0.5 dB dB dB W W W % % mV
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STA575
ELECTRICAL CHARACTERISTCS (continued)
Symbol EN Zbr_in Rdson OLG GB SR Parameter Noise at Output bridge pins Input impedance Output power Rdson Open Loop Voltage Gain Unity Gain Bandwidth Slew Rate IO = 1A Test Condition f = 20Hz to 20KHz; Rg = 50 100 Min. Typ. 12 140 200 100 1.4 8 180 400 Max. Unit V K m dB MHz V/s
PROTECTION Vstby Vmute Vplay Th1 Th2 Unbal. Ground Unbal. Ground UVth Pd_reg. Pd_max Iprot Ilct Stby voltage range Mute voltage range Play voltage range First Over temperature threshold Second Over temperature threshold Upper Unbalancing ground threshold Lower Unbalancing ground threshold Under voltage threshold Power dissipation threshold for system regulation Switch off power dissipation threshold Protection current slope Limiting Current threshold Referred to (CD+ - CD-)/2 Referred to (CD+ - CD-)/2 |Vs+| + |Vs-| Iprot = 50A; @ Vds = 10V @ Vds = 10V for Pd > Pdreg 6.3 18 26 0 1.6 4 130 150 5 -5 20 32 60 400 7 7.5 22 39 0.8 2.5 5 V V V C C V V V W W A/W A
I+Vs
Positive supply current
Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal)
20 20 20 20 50 60 60 50 60 60
5 35 35 5 35 35 100 110 110 100 110 110
7 50 50 7 50 50 200 180 180 200 180 180
mA mA mA mA mA mA A mA mA A mA mA
I-Vs
Negative supply current
ICD+
Positive traking rail supply current
ICD-
Negative traking rail supply current Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal)
6/20
STA575
FUNCTIONAL DESCRIPTION The circuit contains all the blocks to build a stereo amplifier. Each single channel is based on the Output Bridge Power Amplifier, and its protection circuit. Moreover, the compression function and a signal rectifier are added to complete the circuit. The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by the Stby/mute pin: Standby ( Vpin < 0.8V), Mute (1.6V < Vpin < 2.5V), and Play (Vpin > 4V). In the Standby mode all the circuits involved in the signal path are in off condition, instead in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential. These voltages can be get by the external RC network connected to Stby/Mute pin. The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous condition has been detected. The RC network in these cases is used to delay the Normal operation restore. The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit, Under voltage, and output transistor Power sensing as shown in the following table: Table 1. Protection Implementation
Fault Type Chip Over temperature Chip Over temperature Unbalancing Ground Short circuit Under Voltage Extra power dissipation at output transistor Maximum power dissipation at output transistor Condition Tj > 130 C Tj > 150 C |Vgnd| > ((CD+) (CD-))/2 + 5V Iout > 7A |Vs+| + |Vs-|< 20V Pd tr. > 32W Protection strategy Mute Standby Standby Standby Standby Reducing DIGITAL CONVERTER output voltage. Standby Fast Fast Fast Fast Fast Related to the DIGITAL CONVERTER Fast Action time Release time Slow Related to Turn_on sequence Slow, Related to Turn_on sequence Slow, Related to Turn_on sequence Slow, related to Turn_on sequence Slow, related to Turn_on sequence Related to the DIGITAL CONVERTER Slow, related to Turn_on sequence
Pd tr. > 60W
See the POWER PROTECTION paragraph for the details Compression An other important function implemented, to avoid high power dissipation and clipping distortion, is the Compression of the signal input. In fact the preamplifier stage performs a voltage gain equal to 5, fixed by Ri and Rr external resistor, but in case of high input signal or low power supply voltage, its gain could be reduced of 26dB. This function is obtained with a feedback type compressor that , in practice, reduces the impedance of the external feedback network. The behavior of compression it's internally fixed but depends from the Audio input voltage signal level, and from the Threshold voltage applied to the Threshold pin. The attack and release time are programmable by the external RC network connected to the Att_Rel pins. The constraints of the circuit in the typical application are the following: Vthreshold range Vin peak max Vout peak max = -5 to 0 = 8V = 10V
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STA575
Gain without compression (G) Max Attenuation ratio =5 = 26 dB
The following graph gives the representation of the Compressor activation status related to the Vthreshold and the input voltage. The delimitation line between the two fields, compression or not, is expressed by the formula : 2 ( Vth resho ld + 200 mV ) -------------------------------------------------------------------------G Where G is the preamplifier gain without compression. In the compression region the gain of the preamplifier will be reduced (G = 2*Vthreshold/Vin) to maintain at steady state the output voltage equal 2*|Vthreshold| . Instead in the other region the compressor will be off (G = 5). The delimitation line between the two fields can be related to the output voltage of the preamplifier: in this case the formula is : V out = 2 ( Vthre sho ld + 200mV )
Figure 1. Compressor activation field
VIN PEAK 8 6 4 2
G=5
D01AU1264
COMPRESSION G<5
1
2
3
4
5
|Vthreshold|
The relative attenuation introduced by the variable gain cell is the following : 2 ( V th + 200 mV ) Atten uation = 20 log -- ----------------------------------------V in_peak 5 The total gain of the stage will be: Gdb = 20log5 + Attenuation The maximum input swing is related to the value of input resistor, to guarantee that the input current remain under Iin_Max value (1 mA). V in_peak R i > --------------------I in_max
8/20
STA575
Figure 2. Compressor attenuation vs. input amplitude
Attenuation(dB)
0 -6 -12
|Vth =5|
|Vth
-18 -24
|Vt
=2.
5|
h=
1|
D01AU1265
1
2
3
4
5
6
7
8
|Vinpk|
ABSOLUTE VALUE BLOCK The absolute value block rectifies the signal after the compression to extract the control voltage for the external digital converter. The output voltage swing is internally limited, the gain is internally fixed to 14. The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the rectification (between Out_pre and Trk pins). OUTPUT BRIDGE The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two power amplifiers, one in non-inverting configuration with gain equal to 2 and the other in inverting configuration with unity gain. To guarantee the high input impedance at the input pins, Pwr_Inp1 and Pwr_Inp2, the second amplifier stages are driven by the output of the first stages respectively. POWER PROTECTION To protect the output transistors of the power bridge a power detector is implemented (fig 3). The current flowing in the power bridge and trough the series resistor Rsense is measured reading the voltage drop between CD+1 and CD+. In the same time the voltage drop on the relevant power (Vds) is internally measured. These two voltages are converted in current and multiplied: the resulting current , Ipd, is proportional to the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the reference current Ipda, if bigger (dissipated power > 32W) a current, Iprot, is supplied to the Protection pin. The aim of the current Iprot is to reduce the reference voltage for the digital converter supplying the power stage of the chip, and than to reduce the dissipated power. The response time of the system must be less than 200Sec to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated value is higher then 60W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is restarted.
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STA575
Figure 3. Power Protection Block Diagram
RSENSE CD+1 CD+ ILOAD V/I OC1 TO TURN-ON/OFF SEQUENCE
ILIM
CURRENT COMP
MULTIPLIER V/I I_PD
X IPD IPDP IPD
PDP1
TO TURN-ON/OFF SEQUENCE
CURRENT COMP IPROT
TO PROT PAD
OPA
OPA IPDA
OUT1+
CD-
OUT1-
D01AU1266
In fig. 3 there is the power protection strategy pictures. Under the curve of the 32W power, the chip is in normal operation, over 60W the chip is forced in Standby. This last status would be reached if the digital converter does not respond quikly enough reducing the stress to less than 60W. The fig.4 gives the protection current, Iprot, behavior. The current sourced by the pin Prot follows the formula:
( Pd - Pd_av _th ) 5 10 Iprot ----------------------------------------------------------------1.25V
-4
for Pd < Pd_av_th the Iprot = 0 Independently of the output voltage, the chip is also shut down in the folowing conditions: When the currentthrough the sensing resistor, R sense, reaches 7A (Voltage drop (CD+) - (CD+1) = 700mV). When the average junction temperature of the chip reaches 150C. When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)-(CD-))/2 When the sum of the supply voltage |Vs+| + |Vs-| <20V The output bridge is muted when the average junction temperature reaches 130C.
10/20
STA575
Figure 4. Power protection threshold
Id mA) s( Ilim = 6A 7 6 Standby
cK Bu
20 Iprot(mA)
Figure 5. Protection current behaviour
4
Pd_M ax = 48W
10
Li mi 2 ta Normal ti on Operation
10 20 30
Iprot slope=0.4mA/W
Pd_reg = 25W Vds (V 40 50
Pd(W)
D01AU1268
10
20
30
40
50
60
Figure 6. Test Circuit for STA575 Stand-alone
C17
C5
R7
R11
R3 OUT_PRE1 R1 IN_PRE1 R5 C3 R16 CD+ C12 +VS C14 C10 GND C13 -VS D1 CDR22 C15 C11 -VS -VS CD-1 CD-2 PROT R19 THRESH R18 C2 TRK-OUT PROT THRESH 27 1 2 26 16 12 17 21 13 R24 CD+1 CD+ R17 CD+2 +VS ATT_REL1 3 8 9
C7
R9 TRK_1 10 PWR_INP1 7
C1
INPUT1
4
OUT1+ 5V
5 OUT1R13
6 15 22 14 11
STBY/ MUTE
R14
MUTE
STBY
C9
R15
24
OUT2+
23 OUT2C4
TRK-OUT R20
25 ATT_REL2 18 PWR_INP2 TRK_2 R10 C8 19 20 IN_PRE2 R2 OUT_PRE2 R4 R6 INPUT2
R12
R8
C6
C16
D01AU1267
11/20
STA575
EXTERNAL COMPONENTS (refer to fig. 6)
Name Ri R1 = R2 Rr R3 = R4 Cac C1 = C2 Cct C3 = C4 Function Input resistor Value 10K (|G| = 5, Rr = 50K) 50K (|G| = 5, Ri = 10K 100nF (fp = 16Hz, Rac =100K ) 2.2F (Tattack = 13mSec, Vcontrol = 9V, Ict = 1.5mA) 470K (t = 1 Sec. , Cct = 2.2 F ) 10K 56K 10K 1nF 1F 10K 30K 30K 2.2F 100m 5% 4W 100K 100nF 400 , 1W 680nF 1K 40K 470 F , 63V 100pF SB360 Formula Rr R i = -----G Rr = G Rr 1 Cac = -------------------------------2 fp Rac Ict Cct = attack -----------------------Vcontrol
Feedback resistor AC Decoupling capacitor
Capacitor for the attack time
R5 = R6
Release constant time Resistor
Rct = --------Cct
R7 = R8 R9 = R10 R11 = R12 C5 = C6 C7 = C8 R13 R14 R15 C9 R16 = R17 R18 C10 = C11 R22 = R24 C12 = C13 R19 R20 C14 = C15 C16 = C17 D1
Resistor for tracking input voltage filter Resistor for tracking input voltage filter Resistor for tracking input voltage filter Capacitor for Tracking input voltage filter Dc decoupling capacitor Bias Resistor for Stby/Mute function Stby/Mute constant time resistor Mute resistor Capacitor for Stby/Mute resistor Sensing resistor for SOA detector Conversion resistor for threshold voltage Power supply filter capacitor Centering resistor Tracking rail power supply filter Protection TRK_out Power supply filter capacitor Feedback capacitor Schottky diode
Note: Vcontrol is the voltage at Att_Rel pin.
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STA575
APPLICATION HINTS (refer to fig. 6) PREAMPLIFIER AND COMPRESSOR In the test circuit showed in figure 6, R1/R3 (or R2/R4) ratio fix the gain of the preamplifier. If the input signal is very low, is possible to increase the gain fixing the product VinG = cost. In that case is possible to increase G decreasing R1,2 from 10K until 2K without relevant effetcs on the circuitbehavior and remaining in the operating range Iin_max = Vin_max/R1(2),<1mA. So it is possible to increase the preamplifier gain until 25. If no compression is present (equivalnt compressor Gm=0), the effects are: - The output voltage offset increase - The SNR decrease The following table shows these variations:
R1,2 10K 5K 2K VIN MAX 8V 4V 1.6V G 5 10 25 VOFFSET 15mV 30mV 75mV EN 10V 13V 20V
R3(4) = 50K and all the other external components are the same Attenuation = 0 dB If the compression is active the circuit behaviour is the same. It"s also possible to eliminate the compressor. In this case the ATT_REL (1,2) pin must be connected to gnd. STBY-MUTE CIRCUIT In the suggested application circuit (figure 6), the resistor for Standby/Mute function (R13) is connected between the Standby/Mute switches and 5V Supply. It is possible to connect the resistor to another Supply Voltage level VL, but in that case also the resistor value (R13,14) must be changed according to the following formula (fixing VSTBY/MUTE = 2.5V and R15 = 10K):
R 13 = ( 4 VL - 10 )K R 14 = ( 4 VL + 10 )K
HEADROOM In the suggested application circuit the supply voltage to obtain 75W (Power Output) on 8 (Rload) is:
V supply = V + I L, MAX R DS on
It is also possible to increase the system's efficiency forcing the headroom to follow the output signal (variable drop insteadof a constant drop). In that case:
V sup ply = V + IL ( V ) RDS on
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STA575
Figure 7. BASH(R) module SAM351 5.1 with 2 x STA575 (see application note AN1656)
+50VDC Signal Power Supply +/ -24V DC / 50 mA
Dynamic Power Supply (CD+ & CD) Buck Regulator STA575 2 x100Watts
Audio Inputs Lines STABP01 Controller of Controls STA575 2 x 100Watts Audio Input
6 Ohm Loads
STA575 2 x 100Watts
+/ -24V DC / 50 mA Signal Power Supply
Power - On-Off sequences: In order to avoid damages to the SAM261 board it is important to follow these sequences: At Power-On apply in the first the Auxiliary Power Supply (24V) and after the Main Power Supply (+50V), in this condition the system is in "Mute state" and it can move in "play state" with the switch present on the pcb. At Power-Off is better to bring the SAM module in "Mute state" and after that to follow this order: switchoff the Main Supply Voltage (+50V) and subsequently the Auxiliary Power Supply. (24V). System Description & Operating Rules SAM351 is a BASH(R) 5.1 amplifier ( 6 x 100W) implementation utilizing the STA575 Integrated Circuit. Specifically designed for multi-channel implementation in DVD - HTIB systems, Multi-Media systems, AV Receivers. SAM351 is dimensioned to provide the maximum Output Power (THD=10 %) on two channels and instantaneously and 1/3 max Pout on the remaining Outputs, or 1/8 of max Pout continuous; this rule is important to define the main Power Supply size (+50V). Buck Regulator Description The function of the buck regulator is to convert efficiently an input voltage to a lower voltage by adjusting the ratio of the switching transistor's on-time to off-time. The resulting waveform is averaged by the output filter to recover an analog signal. In the BASH amplifier this output is in effect split in half by centering it on the audio ground to provide CD+ and CD- rails. To avoid the need for a high side driver for the transistor switch in the buck regulator the buck circuit recommended has the switch in the return path. Hence the gate drive circuit (part of the STPB01) is referenced to the negative return of the main supply that provides power for the buck regulator.
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STA575
Interfacing STA575 to STPB01 (Feedback circuit) This circuit produces a control signal current that is fed back to the STPB01 digital controller. The network used in this example compares the track signal (STA575 track out) to a fixed ratio of buck regulator's output (CD+) using a transistor. This method is effective because the controller's reference is the negative of the main DC supply, which is not referenced to audio ground. The tracking signal is generated inside the STA575 (track out) by taking the absolute value of the pre-amp's output. The outputs of each channel and of each STA575 are then tied together in a diode-oring arrangement. This means that the highest of any given output is the output that determines the tracking signal. The absolute value circuit inside the STA575 has gain. This makes it possible to use an RC network and a resistor divider to create a phase shift in the tracking signal at higher frequencies. This is also useful in optimizing the alignment of the buck regulator's output with the output signal of the bridge amplifier at high frequency This circuit first converts the buck switch current to a peak voltage. The control current is then converted to a voltage (using a resistor) and added to the peak voltage. By doing this, the buck is better able to maintain the desired headroom over a wide load range and output level. Centering Network for CD+ & CD- Rails The power rail of a bridge amplifier has no current flowing through the ground node, as the load is not connected to ground. However there are several different small sources of dynamic and continuos ground currents flowing from either CD+ or CD- to support the function of various things such as the control signal to the STABP01 controller. The centering network prevents these currents from shifting the CD+/- rails away from center i.e. away from a symmetric split of the buck's output about ground. This is critical, even a small centering error requires an increase in headroom which results in a significant drop in output losses. In its simplest form the centering network could be a resistor divider from CD+ to CD- with its center tied to ground. As long as the impedance is low enough (for example 200 ohms) this will swamp the smaller offset currents. It is helpful to put this kind of passive network on the board with the STA575 devices to help when testing this board on its own. Power Amplifier Heatsink requirements The heatsink requirements are dependent on several design goals. However there are two common references: Pink noise at 1/8 of full power, all channels loaded. This would approximate a system with all channels reproducing music at full volume with clipping occurring only occasionally. The second would be full power at 1kHz for 5 minutes after a one hour pre-soak at 1/8 power. The worse of these two is the full power test. A conservative approach is to assume that the heatsink would come to thermal equilibrium after 5 minutes. Thus the Rth of the heatsink can be determined by:
T jmax - T amb R th heatsink = ---------------------------------- - R th -j Pd
ca se
- R th
c as e to heatsink
For example in the STA575 the Rth jc is 1C / W. R case-to-heatsink with grease is about 0.5C / W. The maximum operating junction temperature is 130C, which for margin should be derated to 120C Buck Regulator Heatsink The Buck regulator heatsink can be designed in a similar manner and does not change by varying power supply. In general the efficiency will be in the order of 85%. The thermal impedances from the junction(s) to the heatsink may be lower and the maximum operating temperature will be higher. Usually either the sub or the remaining channels are tested at full power. The result is that usually the Buck heatsink is about 1/4 the size of the linear heatsink, but this can be strongly affected by the design.
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STA575
Figure 8. PCBs AND COMPONENTS LAYOUT
4 Pin Harness Power Supply Connections
50 VDC Input
+/-24 VDC Input Mute Channel 1 and 2
Channel 3 and 4
Channel 5
Channel 6
9 Pin Harness Audio Connections
SAM261 Specification
Parameter Output Power THD + N SNR Sensitivity Crosstalk Main Power Supply Inputs Aux Power Supply Inputs Input Board Rating 100Watts @10% - 6 < 0.05% @ 40 Watts < 0.05% @ 75 Watts -104 dB (relative to full power) -113 dB (A-weighted) 1 .3VRMS -76dB (relative to10W) 60Volts @ 4 Amps + 24 Volts @ 100mA -24 Volts @ 100mA 1 .3VRMS Amplifier 1KHz 8 Ohms, Maximum Voltage is 60V Minimum Voltage is 50V Vs supply Suplied to facilitate testing see graphs Measured @ 1KHZ Notes
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STA575
Figure 9. THD +N FR Channel
Audio Precision 10 5
Figure 11. Residual Noise vs. Frequency
Audio Precision +0 -20 -40 -60
2 1 0.5 % 0.2
dBr -80 -100
0.1 0.05
-120 -140 -160
10 20 30 40 50 60 70 W 80 90 100 110 120 130 140
0.02 0.01
20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 10. THD + N Frequency
Audio Precision 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 20 Pout = 80W Pout = 30W
Figure 12. Frequency Response
Audio Precision
+40 +38 +36 +34 +32 +30 +28 +26 +24 +22 dBr +20 +18 +16 +14 +12 +10 +8 +6 +4 +2 +0 10
Pout = 5W 50 100 200 500 Hz 1k 2k 5k 10k 20k
20
50
100
200
500 Hz
1k
2k
5k
10k
20k
40k
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STA575
Figure 13. APPICATION BLOCK DIAGRAM
+VS -VS +VS -VS MUTE MUTE MUTE CONTROL & THRESHOLD REFERENCE MUTE-BUCK RED +VS -VS +VS -VS DC++ GATE-DRIVE I-SENSE PWM-SPLY BUCK CONTROLLER CDCD+ IN2 MUTE-BUCK TRACK PROT J1 WHITE CDCD+ THRESH-REF MUTE THRESH-REF IN1 OUT1+ OUT1OUT2+ OUT2TRACK PROT J2 J1
STA575
2 CHANNELS
MUTE
STA575
CD+ PWM-SPLY 1800pF L2 15H 1800pF -VS +VS J2 I-SENSE GATE-DRIVE DC++ 300W BUCK CD+ CDCDMUTE IN3 RED IN4 WHITE -VS +VS CD+ CDMUTE-LIN -VS +VS J3 RED R77 IN6 J4
D02AU1454
2 CHANNELS
PROT TRACK
OUT3+ OUT3OUT4+ OUT4J4 J3
DC++ GND
STA575
2 CHANNELS
PROT TRACK
IN5
OUT5+ OUT0OUT6+ OUT8J6 J5
R78
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STA575
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3
MIN. 4.45 1.80 0.75 0.37 0.80 25.75 28.90
mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 26.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50
MAX. 4.65 2.00 1.05 0.42 0.57 1.20 26.25 29.30
MIN. 0.175 0.070 0.029 0.014 0.031 1.014 1.139
inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 1.023 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019
MAX. 0.183 0.079 0.041 0.016 0.022 0.047 1.033 1.153
OUTLINE AND MECHANICAL DATA
22.07 18.57 15.50 7.70
22.87 19.37 15.90 7.95
0.869 0.731 0.610 0.303
0.904 0.762 0.626 0.313
3.70 3.60
4.30 4.40
0.145 0.142
0.169 0.173
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
Flexiwatt27 (vertical)
(1): dam-bar protusion not included (2): molding protusion included
V C B V H H1 H3 H2 R3 R4 V1 R2 R L L1 A
V3
L4
O
L2
N
L3
V1
V2
R2 L5 G G1 F
R1 R1 R1 E
FLEX27ME
D
Pin 1
M
M1
7139011
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STA575
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (R) 2003 STMicroelectronics - All Rights Reserved is the registered trademark and patented technology of INDIGO manufacturing inc. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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